Zimmer Design Services provides expert consulting and contract design services to the Application Specific Integrated Circuity (ASIC) market.

Specializing in:

  • Timing Closure
  • Static Timing using Synopsys PrimeTime
  • Synthesis using Synopsys Design Compiler
  • Synthesis using Cadence RTL-Compiler
  • RTL coding using Verilog and SystemVerilog
  • Static Timing using IBM Einstimer


  • Synopsys Design Compiler
  • Synopsys PrimeTime
  • Cadence RTL Compiler
  • Atrenta Spyglass-cdc
  • PERL
  • Tcl
  • Verilog
  • SystemVerilog
  • IBM Einstimer